Toshiba Develops Wide-Load-Range High-Efficiency DC-DC Converter for Mobile Devices

February 10, 2014

TOKYO Toshiba Corporation (TOKYO: 6502) today announced that it has developed a new DC-DC converter for mobile devices that offers over 85% efficiency across a load current range more than 3 times wider than that of typical DC-DC converters. Largely due to a new fast and low-ripple phase adding/dropping scheme, the converter eliminates more than 58% of power dissipation during a light load condition, and more than 24% during a heavy load condition.

Toshiba presented this development at the 2014 IEEE International Solid-State Circuit Conference in San Francisco, California, on February 10.

Todays processors utilize multicore designs, resulting in a wide range of current profiles, and require DC-DC converters with a good efficiency over a wide range of load currents. This is realized by using a multiphase architecture that delivers current from several parallel units called phases, and adjusts the number of active phases according to load conditions to optimize the efficiency of the converter.

However, phase adding or dropping induces a large ripple in the output voltage, the result of sudden current surges in the converter. For this reason, the conventional phase adding/dropping scheme can only be applied to devices, such as desktop PCs, that have capacitors of over 1000 F to counter the ripple. Toshiba has developed a new phase adding/dropping scheme that offers over 93% capacitor reduction and realizes implementation in mobile devices. This is realized by a seamless phase adding/dropping transition with a less than 10mV ripple, performed in as fast as 1 switching cycle.

The architecture is based on digital control instead of the mainstream analog control, and the key concept is to ensure current balancing during the transition. However, digital control requires analog-digital converters (ADCs), which boosts system power consumption by 39%. Toshibas new hybrid control architecture eliminates more than 90% of this increase, by time sharing of the existing comparator and digital-analog converter in the system to produce ADC conversion, instead of adding ADC hardware.

LINK:	http://www.semicon.toshiba.co.jp/eng/profile/news/newsrelease/topics/t...
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